### SHLD – Sample and hold

Block SymbolLicensing group: STANDARD

Function Description
The SHLD block is intended for holding the value of the input signal. It processes the input signal according to the mode parameter.

In Triggered sampling mode the block sets the output signal y to the value of the input signal u when rising edge (off$\to$on) occurs at the SETH input. The output is held constant unless a new rising edge occurs at the SETH input.

If Hold last value mode is selected, the output signal y is set to the last value of the input signal u before the rising edge at the SETH input occured. It is kept constant as long as $\mathtt{\text{SETH}}=\mathtt{\text{on}}$. For $\mathtt{\text{SETH}}=\mathtt{\text{off}}$ the input signal u is simply copied to the output y.

In Hold current value mode the u input is sampled right when the rising edge (off$\to$on) occurs at the SETH input. It is kept constant as long as $\mathtt{\text{SETH}}=\mathtt{\text{on}}$. For $\mathtt{\text{SETH}}=\mathtt{\text{off}}$ the input signal u is simply copied to the output y.

The binary input R1 sets the output y to the value y0, it overpowers the SETH input signal.

See also the PARR block, which can be used for storing a numeric value as well.

Inputs

 u Analog input of the block Double (F64) SETH Trigger for the set and hold operation Bool R1 Block reset, $\mathtt{\text{R1}}=\mathtt{\text{on}}\to \mathtt{\text{y}}=\mathtt{\text{y0}}$ Bool

Output

 y Analog output of the block Double (F64)

Parameter

 y0 Initial output value Double (F64) mode Sampling mode  $\odot$3 Long (I32) 1 .... Triggered sampling 2 .... Hold last value 3 .... Hold current value

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